منابع مشابه
High - Voltage CMOS Process Technology
Fuji Electric has developed processes to fabricate ICs. The process satisfies demands for a display driver IC of up to about 100V for a liquid crystal display (LCD), plasma display panel (PDP) and vacuum fluorescent display (VFD). The power control IC has up to about 40V of high voltage and high current analog signal control. The ICs are fabricated using the CMOS (complementary MOS) oxide isola...
متن کاملA New Low-Voltage, Low-Power and High-Slew Rate CMOS Unity-Gain Buffer
Class-AB circuits, which are able to deal with currents several orders of magnitude larger than their quiescent current, are good candidates for low-power and high slew-rate analog design. This paper presents a novel topology of a class AB flipped voltage follower (FVF) that has better slew rate and the same power consumption as the conventional class-AB FVF buffer previously presented in liter...
متن کاملHigh-Accurate Low-Voltage Analog CMOS Current Divider Modify by Neural Network and TLBO Algorithm
A high accurate and low-voltage analog CMOS current divider which operates with a single power supply voltage is designed in 0.18µm CMOS standard technology. The proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. The proposed divider is modeled with neural network while TLBO algorithm is used to optimize it. The proposed optimiza...
متن کاملHigh-Accurate Low-Voltage Analog CMOS Current Divider Modify by Neural Network and TLBO Algorithm
A high accurate and low-voltage analog CMOS current divider which operates with a single power supply voltage is designed in 0.18µm CMOS standard technology. The proposed divider uses a differential amplifier and transistor in triode region in order to perform the division. The proposed divider is modeled with neural network while TLBO algorithm is used to optimize it. The proposed optimiza...
متن کاملHigh-voltage solutions in CMOS technology
This paper presents trends on CMOS high-voltage techniques for power integrated circuits (PICs). Several fully CMOS compatible drain engineering techniques will be presented. Experimental devices were fabricated in standard CMOS processes from three different lithography generations (2, 0.7 and 0.5 mm) without resorting to any extra processing steps. MOS devices layout specificity towards perfo...
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ژورنال
عنوان ژورنال: ECS Proceedings Volumes
سال: 1987
ISSN: 0161-6374,2576-1579
DOI: 10.1149/198713.0060pv